Moving Beyond CMOS – Intel on AI Season 3, Episode 4

In this episode of Intel on AI host Amir Khosrowshahi, assisted by Dmitri Nikonov, talks with Ian Young about Intel’s long-term research to develop more energy-efficient computing based on exploratory materials and devices as well as non-traditional architectures.

Ian is Senior Fellow at Intel and the Director of the Exploratory Integrated Circuits in the Components Research. Ian was one of the key players in the advancement of dynamic and static random-access memory (DRAM, SRAM), and the integration of the bipolar junction transistor and complementary metal-oxide-semiconductor (CMOS) gate into a single integrated circuit (BiCMOS). He developed the original Phase Locked Loop (PLL) based clocking circuit in a microprocessor while working at Intel, contributing to massive improvements in computing power.

Dimitri is a Principal Engineer in the Components Research at Intel. He works in the discovery and simulation of nanoscale logic devices and manages joint research projects with multiple universities. Both Ian and Dmitri have authored dozens of research papers, many together, in the areas of quantum nanoelectronics, spintronics, and non-Boolean architectures.

In the podcast episode, the three talk about moving beyond CMOS architecture, which is limited by current density and heat. By exploring new materials, the hope is to make significant improvements in energy efficiency that could greatly expand the performance of deep neural networks and other types of computing. The three discuss the possible applications of ferroelectric materials, quantum tunneling, spintronics, non-volatile memory and computing, and silicon photonics.

Ian talks about some of the current material challenges he and others are trying to solve, such as meeting operational performance targets and creating pristine interfaces, which mimic some of the same hurdles Intel executives Gordon Moore, Robert Noyce, and Andrew Grove faced in the past. He describes why he believes low-voltage, magneto-electric spin orbit (MESO) devices with quantum multiferroics (materials with coupled magnetic and ferroelectric order) have the most potential for improvement and wide-spread industry adoption.

Academic research discussed in the podcast episode:

• A PLL clock generator with 5 to 110 MHz of lock range for microprocessors
• Clock generation and distribution for the first IA-64 microprocessor
• CMOS scaling trends and beyond
• Overview of beyond-CMOS devices and a uniform methodology for their benchmarking
• Benchmarking of beyond-CMOS exploratory devices for logic integrated circuits
• Tunnel field-effect transistors: Prospects and challenges
• Scalable energy-efficient magnetoelectric spin–orbit logic
• Beyond CMOS computing with spin and polarization
• Optical I/O technology for tera-scale computing
• Device scaling considerations for nanophotonic CMOS global interconnects
• Coupled-oscillator associative memory array operation for pattern recognition
• Convolution inference via synchronization of a coupled CMOS oscillator array
• Benchmarking delay and energy of neural inference circuits